1. Field of the Invention
The present invention relates to a calibration circuit, and more particularly, to a DC offset calibration circuit with analog and digital calibration methods.
2. Description of the Prior Art
The conventional wireless communication systems primarily adopt direct conversion transceiver structures, which usually accompanies with DC offset issues. DC offset is mainly caused by mixing oscillation signal during mixing process, which leads the signal of back-end circuits to be distorted or the amplifier (filter/amplifier) to be saturated and further degrades overall performance of the wireless communication system.
Currently, digital methods are utilized to eliminate the DC offset of the filter or amplifier. For example, a digital DC offset cancellation method includes steps of determining the DC offset by a comparator stage by stage, generating a determination result by digital circuits, and adjusting the DC offset of the amplifier. The digital DC offset cancellation method has the advantage of fast processing speed, while has the disadvantage that when temperature or input signal varies, the outputted DC offset correspondingly changes. Therefore, the DC offset of the amplifier has to be constantly adjusted according to the changes of received signal. Therefore, the conventional digital DC offset cancellation method has to be improved.